W9412G6JH
10.9 System Notes:
a. Pullup slew rate is characterized under the test conditions as shown in Figure 1.
Test point
Output
50Ω
VSSQ
Figure 1: Pullup slew rate test load
b. Pulldown slew rate is measured under the test conditions shown in Figure 2.
VDDQ
50Ω
Output
Test point
Figure 2: Pulldown slew rate test load
c. Pullup slew rate is measured between (VDDQ/2 - 320 mV ± 250 mV)
Pulldown slew rate is measured between (VDDQ/2 + 320 mV ± 250 mV)
Pullup and Pulldown slew rate conditions are to be met for any pattern of data, including all outputs
switching and only one output switching.
Example: For typical slew rate, DQ0 is switching
For minimum slew rate, all DQ bits are switching worst case pattern
For maximum slew rate, only one DQ is switching from either high to low, or low to high
The remaining DQ bits remain the same as for previous state
d. Evaluation conditions
Typical:
25 oC (T Ambient), VDDQ = nominal, typical process
Minimum: 70 oC (T Ambient), VDDQ = minimum, slow-slow process
Maximum: 0 oC (T Ambient), VDDQ = maximum, fast-fast process
Publication Release Date: Nov. 29, 2011
Revision A03
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