W90N745CD/W90N745CDG
Power Down Mode
This mode provides the minimum power consumption. When the W90N745 system is not working or
waiting an external event, software can write PD bit “1” to turn off all the clocks includes system crystal
oscillator to let ARM CORE enter sleep mode. In this state, all peripherals are also in sleep mode
since the clock source is stopped. W90N745 will exit power down state when nIRQ/nFIQ is detected.
W90N745 provides external interrupt nIRQ[1:0], keypad, and USB device interfaces to wakeup the
system clock.
65536 clocks
EXTAL
HCLK
idle _state
wake up by pheripheral's
interrupts
pd_state
HCLK
(cache)
Case3. IDLE=0, PD=1, MIDLE=0
Figure 6.2.9 Clock management for system power down mode and wake up
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