W90N745CD/W90N745CDG
USI Data Receive Register 0/1/2/3 (USI_Rx0/1/2/3)
REGISTER
USI_RX0
USI_RX1
USI_RX2
USI_RX3
ADDRESS
R/W
R
DESCRIPTION
USI Data Receive Register 0
USI Data Receive Register 1
USI Data Receive Register 2
USI Data Receive Register 3
RESET VALUE
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0xFFF8_6210
0xFFF8_6214
0xFFF8_6218
0xFFF8_621C
R
R
R
31
23
15
7
30
22
14
6
29
28
20
12
4
27
19
11
3
26
18
10
2
25
17
9
24
16
8
Rx[31:24]
21
13
5
Rx[23:16]
Rx[15:8]
Rx[7:0]
1
0
BITS
DESCRIPTIONS
Data Receive Register
The Data Receive Registers hold the value of received data of the last
executed transfer. Valid bits depend on the transmit bit length field in the
CNTRL register. For example, if CNTRL[Tx_BIT_LEN] is set to 0x08 and
CNTRL[Tx_NUM] is set to 0x0, bit Rx0[7:0] holds the received data.
[31:0]
Rx
NOTE: The Data Receive Registers are read only registers. A Write to
these registers will actually modify the Data Transmit Registers because
those registers share the same FFs.
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