W90N745CD/W90N745CDG
AIC Source Control Registers (AIC_SCR1 ~ AIC_SCR31)
REGISTER
AIC_SCR1
AIC_SCR2
ADDRESS
0xFFF8_2004
0xFFF8_2008
R/W
R/W
R/W
DESCRIPTION
Source Control Register 1
Source Control Register 2
RESET VALUE
0x0000_0047
0x0000_0047
y y y
y y y
y y y
y y y
y y y
R/W
R/W
R/W
R/W
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
AIC_SCR28 0xFFF8_2070
AIC_SCR29 0xFFF8_2074
AIC_SCR30 0xFFF8_2078
AIC_SCR31 0xFFF8_207C
Source Control Register 28
Source Control Register 29
Source Control Register 30
Source Control Register 31
31
23
15
7
30
22
14
6
29
28
27
19
26
18
10
2
25
17
9
24
16
8
RESERVED
21
13
5
20
12
RESERVED
11
RESERVED
4
3
1
0
SRCTYPE
RESERVED
PRIORITY
BITS
DESCRIPTIONS
[31:8]
Reserved
Reserved
Interrupt Source Type
Whether an interrupt source is considered active or not by the AIC is
subject to the settings of this field. Interrupt sources other than nIRQ0,
nIRQ1 should be configured as level sensitive during normal operation
unless in the testing situation.
SRCTYPE [7:6]
Interrupt Source Type
Low-level Sensitive
[7:6]
SRCTYPE
0
0
1
1
0
1
0
1
High-level Sensitive
Negative-edge Triggered
Positive-edge Triggered
Publication Release Date: September 22, 2006
Revision A2
- 303 -
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