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W90N745CDG 参数 Datasheet PDF下载

W90N745CDG图片预览
型号: W90N745CDG
PDF下载: 下载PDF文件 查看货源
内容描述: 16位/ 32位ARM微控制器 [16/32-bit ARM microcontroller]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 422 页 / 2455 K
品牌: WINBOND [ WINBOND ]
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W90N745CD/W90N745CDG  
BITS  
[6:2]  
[0]  
DESCRIPTIONS  
When the AIC generates the interrupt, VECTOR represents the  
interrupt channel number that is active, enabled, and has the highest  
priority. If the representing interrupt channel possesses a priority level  
0, then the interrupt asserted is FIQ; otherwise, it is IRQ. The value of  
VECTOR is copied to the register AIC_ISNR thereafter by the AIC.  
This register was restored a value 0 after it was read by the interrupt  
handler. This register can help indexing into a branch table to quickly  
jump to the corresponding interrupt service routine.  
Vector  
VECTOR [6:2]: Interrupt Vector  
0 = no interrupt occurs  
1 ~ 31 = representing the interrupt channel that is active, enabled, and  
having the highest priority  
Reserved  
Reserved  
AIC Interrupt Source Number Register (AIC_ISNR)  
REGISTER  
ADDRESS  
R/W  
DESCRIPTION  
RESET VALUE  
R
0x0000_0000  
AIC_ISNR 0xFFF8_2110  
Interrupt Source Number Register  
31  
0
30  
0
29  
28  
0
27  
0
26  
25  
0
24  
0
0
21  
0
0
18  
0
23  
0
22  
0
20  
0
19  
0
17  
0
16  
0
15  
0
14  
0
13  
0
12  
0
11  
0
10  
0
9
8
0
0
7
6
5
4
3
2
1
0
0
0
0
IRQID  
BITS  
DESCRIPTIONS  
[31:5]  
Reserved  
IRQID  
Reserved  
The purpose of this register is to record the interrupt channel number  
that is active, enabled, and has the highest priority.  
[4:0]  
IRQID [4:0]: IRQ Identification  
Stands for the interrupt channel number  
Publication Release Date: September 22, 2006  
- 307 -  
Revision A2  
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