W90N745CD/W90N745CDG
31
IS31
23
30
IS30
22
29
IS29
21
28
IS28
20
27
IS27
19
26
IS26
18
25
IS25
17
24
IS24
16
IS23
15
IS22
14
IS21
13
IS20
12
IS19
11
IS18
10
IS17
9
IS16
8
IS15
7
IS14
6
IS13
5
IS12
4
IS11
3
IS10
2
IS9
1
IS8
0
IS7
IS6
IS5
IS4
IS3
IS2
IS1
RESERVED
BITS
DESCRIPTIONS
This register identifies those interrupt channels whose are both active and
enabled.
ISx: Interrupt Status
Indicates the status of corresponding interrupt channel
0 = Two possibilities:
[31:1]
ISx
(1) The corresponding interrupt channel is inactive no matter
whether it is enabled or disabled;
(2) It is active but not enabled
1 = Corresponding interrupt channel is both active and enabled (can assert an
interrupt)
Reserved
[0]
Reserved
AIC IRQ Priority Encoding Register (AIC_IPER)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
R
0x0000_0000
AIC_IPER 0xFFF8_210C
Interrupt Priority Encoding Register
31
0
30
0
29
28
27
0
26
0
25
0
24
0
0
21
0
0
23
0
22
0
20
19
0
18
0
17
0
16
0
0
15
0
14
0
13
0
12
11
0
10
0
9
8
0
4
0
0
7
6
5
3
2
1
0
0
VECTOR
0
0
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