W90N745CD/W90N745CDG
ACTION
Calculate active interrupt
NORMAL MODE
ICE/DEBUG MODE
Read AIC_IPER
Read AIC_IPER
Write AIC_IPER
Write AIC_IPER
Read AIC_IPER
Determine and return the vector of the active interrupt Read AIC_IPER
Push on internal stack the current priority level
Acknowledge the interrupt (Note 1)
No effect (Note 2)
Read AIC_IPER
Read AIC_IPER
Read AIC_IPER
Notes:
y
nIRQ de-assertion and automatic interrupt clearing if the source is programmed as
level sensitive.
y
Note that software which has been written and debugged using this mode will run
correctly in normal mode without modification. However, in normal mode writing to
AIC_IPER has no effect and can be removed to optimize the code
6.12.2 AIC Registers Map
REGISTER
AIC_SCR1
AIC_SCR2
AIC_SCR3
AIC_SCR4
AIC_SCR5
AIC_SCR6
AIC_SCR7
AIC_SCR8
AIC_SCR9
ADDRESS
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DESCRIPTION
Source Control Register 1
Source Control Register 2
Source Control Register 3
Source Control Register 4
Source Control Register 5
Source Control Register 6
Source Control Register 7
Source Control Register 8
Source Control Register 9
Source Control Register 10
Source Control Register 11
Source Control Register 12
Source Control Register 13
Source Control Register 14
Source Control Register 15
RESET VALUE
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
0xFFF8_2004
0xFFF8_2008
0xFFF8_200C
0xFFF8_2010
0xFFF8_2014
0xFFF8_2018
0xFFF8_201C
0xFFF8_2020
0xFFF8_2024
AIC_SCR10 0xFFF8_2028
AIC_SCR11 0xFFF8_202C
AIC_SCR12 0xFFF8_2030
AIC_SCR13 0xFFF8_2034
AIC_SCR14 0xFFF8_2038
AIC_SCR15 0xFFF8_203C
Publication Release Date: September 22, 2006
Revision A2
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