W90N745CD/W90N745CDG
BITS
[31:24]
[23:0]
DESCRIPTIONS
Reserved
TFR_CNT
-
The TFR_CNT represents the required number of GDMA
transfers. The maximum transfer count is 16M –1.
Channel 0/1 Current Source Register (GDMA_CSRC0, GDMA_CSRC1)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
Channel 0 Current Source Address
Register
GDMA_CSRC0
0xFFF0_4010
R
0x0000_0000
Channel 1 Current Source Address
Register
GDMA_CSRC1
0xFFF0_4030
R
0x0000_0000
31
23
15
7
30
29
CURRENT_SRC_ADDR [31:24]
21 20 19
CURRENT_SRC_ADDR [23:16]
12 11
CURRENT_SRC_ADDR [15:8]
28
27
26
18
10
2
25
24
16
8
22
14
6
17
9
13
5
4
3
1
0
CURRENT_SRC_ADDR [7:0]
BITS
DESCRIPTIONS
The 32-bit Current Source Address indicates the source
address where the GDMA transfer is just occurring.
During a block transfer, the GDMA determines the
successive source addresses by adding to or subtracting
from the source base address. Depending on the settings
you make to the control register, the current source
address will remain the same or will be incremented or
decremented.
[31:0]
CURRENT_SRC_ADDR
Publication Release Date: September 22, 2006
- 165 -
Revision A2