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W90N745CDG 参数 Datasheet PDF下载

W90N745CDG图片预览
型号: W90N745CDG
PDF下载: 下载PDF文件 查看货源
内容描述: 16位/ 32位ARM微控制器 [16/32-bit ARM microcontroller]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 422 页 / 2455 K
品牌: WINBOND [ WINBOND ]
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W90N745CD/W90N745CDG  
6.7 USB Host Controller  
The Universal Serial Bus (USB) is a low-cost, low-to-mid-speed peripheral interface standard  
intended for modem, scanners, PDAs, keyboards, mice, and other devices that do not require a high-  
bandwidth parallel interface. The USB is a 4-wire serial cable bus that supports serial data exchange  
between a Host Controller and a network of peripheral devices. The attached peripherals share USB  
bandwidth through a host-scheduled, token-based protocol. Peripherals may be attached, configured,  
used, and detached, while the host and other peripherals continue operation (i.e. hot plug and unplug  
is supported).  
A major design goal of the USB standard was to allow flexible, plug-and-play networks of USB  
devices. In any USB network, there will be only one host, but there can be many devices and hubs.  
The USB Host Controller has the following features:  
Open Host Controller Interface (OHCI) Revision 1.1 compatible.  
USB Revision 1.1 compatible  
Supports both low-speed (1.5 Mbps) and full-speed (12Mbps) USB devices.  
Handles all the USB protocol.  
Built-in DMA for real-time data transfer  
Multiple low power modes for efficient power management  
6.7.1 USB Host Functional Description  
6.7.1.1. AHB Interface  
The OpenHCI Host Controller is connected to the system by the AHB bus. The design requires both  
master and slave bus operations. As a master, the Host Controller is responsible for running cycles  
on the AHB bus to access EDs and TDs as well as transferring data between memory and the local  
data buffer. As a slave, the Host Controller monitors the cycles on the AHB bus and determines when  
to respond to these cycles. Configuration and non-real-time control access to the Host Controller  
operational registers are through the AHB bus slave interface.  
6.7.1.2. Host Controller  
List Processing  
The List Processor manages the data structures from the Host Controller Driver and coordinates all  
activity within the Host Controller.  
Frame Management  
Frame Management is responsible for managing the frame specific tasks required by the USB  
specification and the OpenHCI specification. These tasks are:  
1) Management of the OpenHCI frame specific Operational Registers  
2) Operation of the Largest Data Packet Counter.  
3) Performing frame qualifications on USB Transaction requests to the SIE.  
4) Generate SOF token requests to the SIE.  
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