W83115RG-BW/W83115WG-BW
STEPLESS FOR INTEL BROADWATER CLOCK GENERATOR
Register 2: ( Default : FFh ), continued.
AFFECTED PIN/
BIT
PWD
FUNCTION DESCRIPTION
TYPE
FUNCTION NAME(S)
PCI3 output control
3
PCIEN<3>
PCIEN<2>
PCIEN<1>
PCIEN<0>
1
1: Output enable
0: Output disable
R/W
PCI2 output control
1: Output enable
0: Output disable
PCI1 output control
1: Output enable
0: Output disable
PCI0 output control
1: Output enable
0: Output disable
2
1
0
1
1
1
R/W
R/W
R/W
7.4 Register 3: ( Default : FFh )
AFFECTED PIN/
BIT
PWD
FUNCTION DESCRIPTION
TYPE
FUNCTION NAME(S)
SRC11 output control
1: Output enable
7
SRCEN<11>
1
R/W
0: Output disable
SRC10 output control
1: Output enable
0: Output disable
SRC9 output control
1: Output enable
0: Output disable
6
5
SRCEN<10>
SRCEN<9>
1
1
R/W
R/W
SRC8 or CPU2_ITP output control
1: Output enable
4
SRCEN<8>
1
R/W
0: Output disable
SRC7 output control
1: Output enable
0: Output disable
SRC6 output control
1: Output enable
0: Output disable
SRC5 output control
1: Output enable
0: Output disable
SRC4 output control
1: Output enable
0: Output disable
3
2
1
0
SRCEN<7>
SRCEN<6>
SRCEN<5>
SRCEN<4>
1
1
1
1
R/W
R/W
R/W
R/W
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