SCA8X0/21X0/3100 Series
4.1.1 Register read operation
An example of X-axis acceleration read command is presented in Figure 4. Master gives the
register address to be read via MOSI line: '05' in hex format and '000101' in binary format, register
name is X_MSB (X-axis MSB frame). 7th bit is set to '0' to indicate the read operation and 8th bit is 1
for odd parity.
The sensor replies to asked operation by transferring the register content via MISO line. After
transferring the asked X_MSB register content, master gives next register address to be read: '04'
in hex format and '000100' in binary format, register name is X_LSB (X-axis LSB frame). The
sensor replies to asked operation by transferring the register content MSB first.
Figure 4: Example of 16 bit acceleration data transfer from registers DOUT2-1 (05h,04h).
DO15…DO0 bits are acceleration data bits (DO15=MSB) and parity (dPAR) is odd parity of register
of 8 data bits. FRME is possible frame error bit of previous frame, PORST is reset bit, ST is self-
test status bit and SAT is output saturation status bit.
4.1.2 Decremented register read operation
In Figure 5 is presented a decremented read operation where the content of four output registers is
read by one SPI frame. After normal register addressing and one register content reading the µC
keeps CSB line low and continues supplying the SCK pulses. After every 8 SCK pulses the output
data address is decremented by one and the previous DOUT register's content is shifted out
without parity bits. Parity bit is calculated and transferred only for the first data frame. From X_LSB
register address the SCA21X0/SCA31X0 jumps to Z_MSB. Decremented reading is possible only
for registers X_LSB ... Z_MSB in SCA21X0 and SCA31X0 series.
Decremented read is not recommended in fail-safe critical applications because output data parity
is only available for first 8bit data.
Figure 5: An example of decremented read operation.
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