VG3617161ET
1,048,576 x 16 - Bit
CMOS Synchronous Dynamic RAM
VIS
Auto Precharge after Read Burst (2 of 2)
Burst Length=4, CAS Latency=3
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
t
CK3
Start Auto Precharge
Bank B
Start Auto Precharge
Bank B
Start Auto Precharge
Bank A
High
CS
RAS
CAS
WE
A11(BS)
RBa
RBa
RBb
A10
RAa
A0~A9
CBa
RBb
CAa
CAb
CBb
RAa
DQM
DQ
Hi-Z
QBa0 QBa1 QBa2
Read with
Auto Precharge
Command
Bank A
QAb0 QAb1 QAb2
QAb3 QBb0 QBb1 QBb2 QBb3
QAa3
QBa3
QAa0 QAa1
QAa2
Activate
Command
Bank A
Read
Command
Bank A
Read with
Read with
Auto Precharge
Command
Bank B
Auto Precharge
Command
Bank B
Activate
Command
Bank B
Activate
Command
Bank B
Document:1G5-0189
Rev.1
Page56