VG3617161ET
1,048,576 x 16 - Bit
CMOS Synchronous Dynamic RAM
VIS
Auto Precharge after Read Burst (1 of 2)
Burst Length=4, CAS Latency=2
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
t
CK2
Start Auto Precharge
Bank B
Start Auto Precharge
Bank A
High
Start Auto Precharge
Bank B
CS
RAS
CAS
WE
A11(BS)
RAa
RBa
RBa
RBb
RAc
A10
A0~A9
CBa
CAb
RBb
CAa
CBb
RAc
CAc
RAa
DQM
DQ
Hi-Z
QBa0 QBa1 QBa2
Read with
QAb0 QAb1 QAb2
QAa3
QBa3
QAb3 QBb0
QBb1 QBb2 QBb3 QAc0 QAc1 QAc2
QAa0 QAa1
QAa2
Activate
Activate
Command
Bank A
Read
Command
Bank A
Activate
Command
Bank B
Read with
Activate
Command
Bank A
Command
Auto Precharge
Auto Precharge
Command
Bank A
Read with
Command Bank B
Bank A
Auto Precharge
Command
Bank B
Read with
Auto Precharge
Command
Bank A
Document:1G5-0189
Rev.1
Page55
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
