VG3617161ET
1,048,576 x 16 - Bit
CMOS Synchronous Dynamic RAM
VIS
Random Row Write (Interleaving Banks) (1 of 2)
Burst Length=8, CAS Latency=2
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
t
CK2
High
CS
RAS
CAS
WE
A11(BS)
RAa
RBa
RBa
RAb
RAb
A10
A0~A9
RAa
CBa
CAb
CAa
t
t
t
t
RCD
DPL
DPL
RP
DQM
DQ
Hi-Z
QAa5 QAa6 QAa7
QAa0
Write
QAa4
QBa0 QBa1 QBa2
DAb2
QBa6 QBa7
DAb0 DAb1
QAa1 QAa2
QBa3 QBa4
DAb3
DAb4
QAa3
QBa5
Activate
Command
Bank A
Precharge
Command
Bank A
Write
Command
Bank A
Active
Activate
Command
Bank B
Command
Bank A
Command
Bank A
Precharge
Command
Bank B
Write
Command
Bank B
Document:1G5-0189
Rev.1
Page47
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
