VG3617161ET
1,048,576 x 16 - Bit
CMOS Synchronous Dynamic RAM
VIS
Random Row Read (Interleaving Banks) (2 of 2)
Burst Length=8, CAS Latency=3
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
t
CK3
High
CS
RAS
CAS
WE
A11(BS)
RBb
RBb
RBa
RAa
RAa
A10
A0~A9
CAa
RBa
CBa
CBb
t
t
t
AC3
RP
RCD
DQM
DQ
Hi-Z
QBa0
QBa4
QBa5 QBa6 QBa7
QAa0 QAa1
QAa2
QBb0
QAa7
QBa2
QAa4
QBa1
QAa3
QAa6
QBa3
QAa5
Read
Read
Command
Bank B
Activate
Command
Bank B
Precharge
Activate
Command
Bank B
Activate
Command
Bank A
Read
Command
Bank A
Precharge
Command
Bank B
Command
Bank B
Command
Bank B
Document:1G5-0189
Rev.1
Page46
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
