VG3617161ET
1,048,576 x 16 - Bit
CMOS Synchronous Dynamic RAM
VIS
Random Row Read (Interleaving Banks) (1 of 2)
Burst Length=8, CAS Latency=2
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
t
CK2
High
CS
RAS
CAS
WE
A11(BS)
RBa
RAa
RAa
RBb
RBb
A10
A0~A9
RBa
CBb
CBa
CAa
t
t
t
AC2
RP
RCD
DQM
DQ
Hi-Z
QBb1
QBb0
QBa0
QBa4
QBa5 QBa6 QBa7
QAa0 QAa1
QAa2
QBa1 QBa2
QAa3 QAa4
QAa6 QAa7
Read
QBa3
QAa5
Activate
Command
Bank B
Read
Command
Bank B
Precharge
Active
Command
Bank B
Activate
Command
Bank A
Command
Bank B
Command
Bank B
Read
Command
Bank A
Document:1G5-0189
Rev.1
Page45
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
