VG3617161ET
1,048,576 x 16 - Bit
CMOS Synchronous Dynamic RAM
VIS
5.Mode Register
1
11 10
9
8
0
5
6
6
4
3
WT
2
2
0
0
7
0
Burst Read and Single Write
X=Don’t care
LTMODE
0
0
1
BL
1
11 10
5
4
LTMODE
8
0
3
WT
9
7
0
Mode Register Set
0
0
0
BL
Bits2-0
000
WT=1
1
WT=0
1
001
010
011
100
101
110
111
2
4
2
4
8
8
Burst length
R
R
R
R
R
R
R
Full page
0
1
Sequential
Interleave
Wrap type
Bits6-4
000
CAS Iatency
R
R
2
001
010
011
100
101
110
111
3
Latency
mode
R
R
R
R
Remark R:Reserved
Document:1G5-0189
Rev.1
Page15