VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
High Performance Serial
Backplane Transceiver
VSC870
DC Characteristics
Table 5: LVDS and TTL Inputs and Outputs
Parameters
Description
Min
Typ
Max
Units
Conditions
IOH = -6.0 mA
VOH
VOL
VOCM
∆VOUT
VICM
∆VIN
VIH
Output HIGH voltage (TTL)
Output LOW voltage (TTL)
O/P Common Mode Range (LVDS)
Differential Output Voltage (LVDS)
I/P Common Mode Range (LVDS)
Differential Input Voltage (LVDS)
Input HIGH voltage (TTL)
2.4
—
—
—
—
—
—
—
—
—
—
—
—
0.4
V
V
IOL = +6.0 mA
At Min ∆VOUT
100Ω across input
At Min ∆VIN
—
1.2
400
0.8
200
2.0
0
2.1
V
1000
2.5
mV
V
1600
VDD+1.0
0.8
mV
V
—
VIL
Input LOW voltage (TTL)
V
—
IIH
Input HIGH current (TTL)
—
500
µA
µA
VIN =2.4V
VIN = 0.4V
IIL
Input LOW current (TTL)
- 50
—
Hot Swap
The LVDS input and output buffers are subject to hot swap events while being connected and disconnected from
the passive backplane. If the input is powered down but still receiving a signal from an output, the input must tolerate
extra input current and power. If the input is powered up but has no input connection, it will go to a valid logic state.
The table below lists the LVDS I/O parameters that relate to hot swap condition.
Table 6: Hot Swap LVDS I/O Parameters
Parameters
Description
Value
Units
Conditions
ICO
ICI
LVDS maximum current delivered per output pin
LVDS maximum current allowed per input pin
LVDS maximum added power per output pin
LVDS input default logic state
10
40
mA
mA
mW
—
Normal Operation
VDD = 0V
PCI
60
VDD = 0V
VCDL
LOW
Input Open
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52190-0, Rev 4.1
01/05/01
Page 35
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