VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
High Performance Serial
Backplane Transceiver
VSC870
Figure 19: LVDS Input and Output Buffer Designs
Transmitter
Backplane
Receiver
50
50
100
Power Dissipation
Table 7: Power Supply Currents
Parameter
Description
(Max)
Units
IDD
IDDA
PD
Power supply current from VDD and VDDA (VDD, VDDA = +3.3V + 5%)
Power supply current from VDDA (VDDA = +3.3V + 5%)
Power dissipation (VDD, VDDA = +3.3V + 5%)
1587
200
5.5
mA
mA
W
(1)
Absolute Maximum Ratings
Power Supply Voltage (VDD) Potential to GND.................................................................................-0.5V to +4V
DC Input Voltage (LVDS inputs) .......................................................................................... -0.5V to V + 1.0V
DD
DC Input Voltage (TTL inputs) ......................................................................................................... -0.5V to 5.5V
DC Output Voltage (TTL outputs) ........................................................................................ -0.5V to V + 1.0V
DD
Output Current (TTL outputs).................................................................................................................. +/-50mA
Output Current (LVDS outputs) ................................................................................................................+/-50mA
o
o
Case Temperature Under Bias......................................................................................................-55 C to +125 C
o
o
Storage Temperature.....................................................................................................................-65 C to +150 C
NOTE: (1) Caution: Stresses listed under “Absolute Maximum Ratings” may be applied to devices one at a time without causing
permanent damage. Functionality at or exceeding the values listed is not implied. Exposure to these values for extended
periods may affect device reliability.
Recommended Operating Conditions
Power Supply Voltage (V , V
Extended Commercial Operating Temperature Range (T).............................................................. 0 C to 85 C
) ....................................................................................................+3.3V±5 %
DD
DDA
(1)
o
o
NOTE: (1) Lower limit of specification is ambient temperature and upper limit is case temperature.
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 36
G52190-0, Rev 4.1
01/05/01
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
