VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
High Performance Serial
Backplane Transceiver
VSC870
Figure 10: Cell Based System
Port Card
Queuing
System
Trans
Switch Card
VSC870
Switch
Chip
Arbiter/
Scheduler
VSC880
Port Card
Queuing
System
Trans
Communication Bus
VSC870
3.2 Data Encoding Format
The data word and command word format is described in section 1.0. These word formats are similar for both the
transceivers at the port cards and the transceivers at the controller chip. The BYPASS signal is set HIGH so the
RXTYP[1:0] and TXTYP[1:0] are the direct representation of the overhead bits (B[1:0]) in the serial channels. For
data words, the user can use these bits for signaling to the receiving port card. Information such as start of frame and
end of frame can be passed through the switch in this manner. At the serial interface, the data words must be
scrambled to increase the signal edge transition density by setting the SCRAM input HIGH. The scrambling pattern is
reset at cell clock. The transceiver checks the bit pattern on IDLE words to detect a link error condition. The encoding
for these data types is described in the following table.
TXTYP[1:0]
RXTYP[1:0]
Error
Check
B[1:0]
Datatypes
SCRAM = 1
No Scramble
SCRAM = 0
No Scramble
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
Command Word
Data Word
IDLE word
Scramble
Scramble
Scramble
No Scramble
No Scramble
No Scramble
No
No
No
Data Word
Data Word
3.3 Transmitter Operation
When BYPASS is set HIGH, all of the retransmit and self-routing functions in Packet Mode are disabled. The
CELLSYN input is set HIGH to allow the cell synchronization process. All words, either data words or command
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
G52190-0, Rev 4.1
01/05/01
Page 27
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Internet: www.vitesse.com
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