VSC8601 Datasheet
Contents
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
4.2.8
4.2.9
Device Identification ............................................................................... 41
Auto-Negotiation Advertisement ............................................................... 41
Link Partner Auto-Negotiation Capability .................................................... 42
Auto-Negotiation Expansion ..................................................................... 43
Transmit Auto-Negotiation Next Page......................................................... 43
Auto-Negotiation Link Partner Next Page Receive ........................................ 44
1000BASE-T Control................................................................................ 44
4.2.10 1000BASE-T Status................................................................................. 45
4.2.11 Main Registers Reserved Addresses........................................................... 45
4.2.12 1000BASE-T Status Extension 1................................................................ 45
4.2.13 100BASE-TX Status Extension .................................................................. 46
4.2.14 1000BASE-T Status Extension 2................................................................ 46
4.2.15 Bypass Control....................................................................................... 47
4.2.16 Receive Error Counter ............................................................................. 48
4.2.17 False Carrier Sense Counter ..................................................................... 48
4.2.18 Disconnect Counter................................................................................. 49
4.2.19 Extended Control and Status.................................................................... 49
4.2.20 Extended PHY Control Set 1 ..................................................................... 50
4.2.21 Extended PHY Control Set 2 ..................................................................... 50
4.2.22 Interrupt Mask ....................................................................................... 51
4.2.23 Interrupt Status ..................................................................................... 52
4.2.24 LED Control ........................................................................................... 52
4.2.25 Auxiliary Control and Status..................................................................... 53
4.2.26 Delay Skew Status.................................................................................. 54
4.2.27 Reserved Address Space.......................................................................... 54
4.3 Extended Page Registers ..................................................................................... 55
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
4.3.9
Extended Page Access............................................................................. 56
Enhanced LED Method Select ................................................................... 56
Enhanced LED Behavior........................................................................... 57
CRC Good Counter.................................................................................. 58
MAC Resistor Calibration Control............................................................... 58
Extended PHY Control 3........................................................................... 59
EEPROM Interface Status and Control........................................................ 59
EEPROM Data Read/Write ........................................................................ 60
Extended PHY Control 4........................................................................... 60
4.3.10 Reserved Extended Registers ................................................................... 61
4.3.11 Extended PHY Control 5........................................................................... 61
4.3.12 RGMII Skew Control................................................................................ 62
4.3.13 Ethernet Packet Generator (EPG) Control 1 ................................................ 63
4.3.14 Ethernet Packet Generator Control 2 ......................................................... 64
4.4 CMODE............................................................................................................. 64
4.4.1
4.4.2
4.4.3
CMODE Pins and Related Functions ........................................................... 64
Functions and Related CMODE Pins ........................................................... 65
CMODE Resistor Values............................................................................ 65
4.5 EEPROM............................................................................................................ 66
4.5.1
4.5.2
EEPROM Contents Description .................................................................. 66
Read/Write Access to the EEPROM ............................................................ 67
5
Electrical Specifications ...................................................................69
5.1 DC Characteristics.............................................................................................. 69
5.1.1
5.1.2
VDDIO at 3.3 V ...................................................................................... 69
VDDIO at 2.5 V ...................................................................................... 70
5.2 Current Consumption.......................................................................................... 70
5.2.1
5.2.2
Consumption with 1000BASE-T Link .......................................................... 70
Consumption with 100BASE-TX Link.......................................................... 71
Revision 4.1
September 2009
Page 4
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
