VSC7961
Data Sheet
LOS Sensitivty
f = 2.5GHz, K28.5 Pattern
LOS Hysterisis
f = 2.5Gb/s, K28.5 Pattern
12k
Threshold Resistance (Ω)
10k
Assert
5
4
Hysterisis (dB)
50
8k
6k
Deassert
4k
2k
0k
0
10
20
30
40
Differential Voltage Input (mVp-p)
3
2
1
0
0
2k
4k
6k
8k
10k
12k
Threshold Resistance (Ω)
LOS Typical Distribution
Assert/Deassert, R
TH
= 5.6kΩ
LOS Typical Distribution
Hysterisis, R
TH
= 5.6kΩ
45
40
35
Assert
Deassert
Percentage of Parts (%)
Hysterisis
30
25
20
15
10
5
0
0.4
0.8
1.2
1.6
2.4
2.8
3.2
3.6
4.4
4.8
5.2
5.6
0
2
4
12
16
20
24
28
32
36
40
44
48
0
4
8
More
6
Percentage of Parts (%)
35
30
25
20
15
10
5
0
Voltage Input Level (mVp-p)
Hysterisis (dB)
PCB L
AYOUT
G
UIDELINES
Use high frequency PCB layout techniques with solid ground planes to minimize crosstalk and EMI. Keep high-speed
traces as short as possible for signal integrity. The output traces to the laser diode must be short to minimize
inductance. Short output traces will provide best performance.
7 of 14
G52360, Rev 4.0
5/15/03
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
