VSC7961
Data Sheet
1
2
3
4
5
6
18
17
16
15
14
13
CZ2
GND
IN+
SQUELCH
VCC
OUT+
OUT−
VCC
VSC7961
IN−
Top View
GND
LEVEL
LOS
Exposed paddle must be connected to most negative
rail or left floating. Heat must be removed through the
printed circuit board (PCB).
Figure 4. Pin Diagram for 24-Pin QFP-N (YF)
Table 9. Pin Identification for 24-Pin QFP-N (YF)
Pin Name Pin Number Description
CZ2
1
Offset Correction Loop Capacitor. Place capacitor between this pin and CZ1 to alter time constant of off-
set correction loop.
GND
IN+
2
3
4
5
6
Supply ground.
Noninverted data input.
Inverted data input.
Supply ground.
IN–
GND
LEVEL
Output Current Level. This pin may be either connected to ground or left unconnected. Connecting to
ground causes output current to be 20mA. The output is 16mA when left unconnected.
TH
7
Loss of Signal (LOS) Threshold. Connect a resistor from this pin to ground to set the input signal level at
which LOS outputs will be asserted.
NC
8
No connection.
NC
9
No connection.
NC
10
11
12
13
14
15
16
17
18
No connection.
LOS
NC
Inverted Loss of Signal Output. LOS is HIGH for input signals above the threshold programmed by TH.
No connection.
LOS
VCC
OUT–
OUT+
VCC
SQUELCH
Noninverted Loss of Signal Output. LOS is LOW for input signals above the threshold programmed by TH.
Power zsupply.
Inverted data output.
Noninverted data output.
Power supply.
Squelch Input. Squelch is disabled if this pin is unconnected or set LOW. When SQUELCH is HIGH,
OUT+ and OUT– are forced to static levels when LOS is HIGH.
NC
NC
NC
NC
NC
CZ1
19
20
21
22
23
24
No connection.
No connection.
No connection.
No connection.
No connection.
Offset Correction Loop Capacitor. Place capacitor between this pin and CZ2 to alter time constant of off-
set correction loop.
11 of 14
G52360, Rev 4.0
5/15/03
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
