VSC6134
Datasheet
Table 383. Add/Drop FEC Frame Aligner Register 1 (continued)
Reset
Value
Bit
Name
Access
Description
9
FEC_AUTO_OOF
R/W
0: Disables framing bit errors from forcing OOF.
1: Enables framing bit errors to force OOF.
1
8
FEC_SCRAMBLER_MODE
Reserved
R/W
RO
To select the polynomial for the scrambler. Required only
for FEC aligner not for SONET.
0: G.709 scrambler
0
1: G.975 scrambler
7:0
0x00
3.10.8
Add/Drop FEC Frame Aligner Register 2
Address:
0xD0A: Add Path
0x102: Drop Path
0x23D4
Register Reset Value:
Table 384. Add/Drop FEC Frame Aligner Register 2
Reset
Value
Bit
Name
Access
Description
15:13
FEC_INFRAME_CTRL
R/W
Determines the number of consecutive frames with valid
framing pattern to clear the OOF condition. The number of
frames is FEC_INFRAME_CTRL + 1.
001
12:2
FEC_LOFCLRCNT[10:0]
R/W
Determines the number of frames for which OOF signal
should remain de-asserted to clear the LOF condition.
Number of frames is FEC_LOFCLRCNT +1.
0x0F5
1
0
FEC_MASK_GEN_NFA
Reserved
R/W
RO
A 1 masks the generate NFA request.
0
0
3.10.9
Add/Drop FEC Frame Aligner Register 3
Address:
0xD0B: Add Path
0x103: Drop Path
0x83D4
Register Reset Value:
Table 385. Add/Drop FEC Frame Aligner Register 3
Reset
Value
Bit
Name
Access
Description
15:13
FEC_OOF_CTRL[2:0]
R/W
Determines the number of consecutive frames with the
wrong framing pattern, after which OOF is asserted.
Number of frames is FEC_OOF_CTRL +1. Default is 5
frames.
100
12:2
1:0
FEC_LOFSETCNT[10:0]
Reserved
R/W
RO
Determines the number of frames for which OOF should
remain asserted to declare LOF condition. Number of
frames is FEC_LOFSETCNT + 1. Default is 246.
0x0F5
00
356 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
