VSC6134
Datasheet
3.8.94
Framed PRBS Configuration Register
Address:
0xF74: Add Path
0x774: Drop Path
0x0000
Register Reset Value:
Table 295. Framed PRBS Configuration Register
Reset
Value
Bit
15
Name
Access
R/W
Description
FPRBSENABLE
FPRBSSELECT
Framed PRBS enable.
0
14:13
R/W
Framed PRBS select.
00
These bits select one of four possible PRBS sequences to
detect.
00: 1 + x14 + x15
01: 1 + x3 + x20
10: 1 + x18 + x23
11: 1 + x28 + x31
12
11
FPRBSINVERT
FPRBSCONFIG
R/W
R/W
Framed PRBS invert.
When 1, the monitor inverts the received bits.
0
0
Framed PRBS configuration.
When 0, the monitor excludes the payload stuff bytes when
searching for the PRBS sequence.
10:0
Reserved
RO
0x000
322 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
