VSC6134
Datasheet
3.9
10 GbE Receiver Monitor Registers
3.9.1
PCS Status Register
Address:
0x980: Add Path
0x180: Drop Path
0x0000
Register Reset Value:
Table 296. PCS Status Register
Reset
Value
Bit
15
Name
Access
Description
PCS_LOCKS
PCS_HIBERS
RESERVED
PCS_LOCKL
R/W
R/W
RO
1: Indicates change of status in PCS_LOCKL bit.
1: Indicates change of status in PCS_HIBERL bit.
Reserved.
0
14
0
0x000
0
13:8
7
RO
1: Indicates block synchronized live.
0: indicates block not synchronized live.
6
PCS_HIBERL
Reserved
RO
RO
1: Indicates BER > 10e-4 live. This is only valid when
PCS_LOCKL = 1.
0
5:0
0x000
3.9.2
PCS Interrupt Mask Register
Address:
0x981: Add Path
0x181: Drop Path
0xC000
Register Reset Value:
Table 297. PCS Interrupt Mask Register
Reset
Value
Bit
15
Name
Access
R/W
Description
PCS_LOCKM
PCS_HIBERM
Reserved
1: Masks PCS_LOCKS interrupt.
1: Masks PCS_HIBERS interrupt.
1
1
14
R/W
13:0
RO
0x0000
323 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
