VSC6134
Datasheet
3.3.9
BER Monitor Signal Degrade Error Decrement Register
Address:
0xC67: Add Path
0x467: Drop Path
0x004D
Register Reset Value:
Table 118. BER Monitor Signal Degrade Error Decrement Register
Reset
Value
Bit
15
Name
Access
RO
Description
Reserved
SD_ERR_DEC
0
14:0
R/W
Signal Degrade Error Decrement register. This value is
ignored for the rate detection algorithm CNT_CLR_CTRL
=’1’.
0x04D
3.3.10
BER Monitor Signal Fail Monitored Frames (MSW) Register
Address:
0xC68: Add Path
0x468: Drop Path
0x0000
Register Reset Value:
Table 119. BER Monitor Signal Fail Monitored Frames (MSW) Register
Reset
Value
Bit
15:4
3:0
Name
Access
RO
Description
Reserved
0x000
0x0
SF_FRAME[19:16]
R/W
Upper portion of the SF_FRAME register
3.3.11
BER Monitor Signal Fail Monitored Frames (LSW) Register
Address:
0xC69: Add Path
0x469: Drop Path
0x0040
Register Reset Value:
Table 120. BER Monitor Signal Fail Monitored Frames (LSW) Register
Reset
Value
Bit
Name
Access
Description
15:0
SF_FRAME[15:0]
R/W
Lower portion of the SF_FRAME register
0x0040
236 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
