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VSC6134ST-01 参数 Datasheet PDF下载

VSC6134ST-01图片预览
型号: VSC6134ST-01
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 438 页 / 4019 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
 浏览型号VSC6134ST-01的Datasheet PDF文件第35页浏览型号VSC6134ST-01的Datasheet PDF文件第36页浏览型号VSC6134ST-01的Datasheet PDF文件第37页浏览型号VSC6134ST-01的Datasheet PDF文件第38页浏览型号VSC6134ST-01的Datasheet PDF文件第40页浏览型号VSC6134ST-01的Datasheet PDF文件第41页浏览型号VSC6134ST-01的Datasheet PDF文件第42页浏览型号VSC6134ST-01的Datasheet PDF文件第43页  
VSC6134  
Datasheet  
Figure 1. OTU Row Structure Using RS(255,239) Codes  
codeword #16  
FEC sb -ro1
Information bytes  
Parity check bytes  
1
2
3
9
2
4
0
2
5
5
codeword #2  
FEC
Information bytes  
Parity check bytes  
1
2
3
9
2
4
0
2
5
5
codeword #1  
FEC sub -row #1  
Information bytes  
Parity check bytes  
1
1
2
3
9
2
4
0
2
5
5
Information bytes  
Parity check bytes  
OTU row  
2
1
6
3
8
2
4
3
8
2
5
3
8
2
6
3
8
4
0
4
0
8
0
...  
...  
In Standard FEC mode, the VSC6134 performs error correction and detection using only RS codes.  
Figure 4, page 43 shows the bit-error ratio (BER) enhancement as a result of RS(255,239) coding.  
The generator polynomial of the code is given by:  
(EQ 1)  
15  
i
G(z) =  
(z α )  
i = 0  
8
4
3
2
where α is a root of the binary primitive polynomial x + x + x + x + 1. The FEC code word consists  
of information bytes and parity bytes (FEC redundancy) and is represented by the polynomial:  
C(z) = I(z) + R(z)  
(EQ 2)  
(EQ 3)  
(EQ 4)  
Information bytes are represented by:  
254  
253  
16  
I(z) = D × z + D × z + ... + D × z  
254  
253  
16  
Where D (j = 16 to 254) is the information byte represented by an element out of GF(256) and  
j
D = d × α 7 + d × α 6 + ... + d × α 1 + d  
j
7j  
6j  
1j  
0j  
Bit d is the MSB and d the LSB of the information byte. D corresponds to the byte 1 in the  
7j  
0j  
254  
RS codeword and D to byte 239.  
16  
39 of 438  
VMDS-10185 Revision 4.0  
July 2006  
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