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VSC6134ST-01 参数 Datasheet PDF下载

VSC6134ST-01图片预览
型号: VSC6134ST-01
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 438 页 / 4019 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VSC6134  
Datasheet  
1.2.3.1  
Iterative Decoding with Concatenated Codes  
The VSC6134 device uses iterative encoding and decoding with concatenated BCH-BCH codes. The  
following figure shows the iterative decoding scheme.  
Figure 3. BCH-BCH Iterative Decoding Scheme  
Inter-  
leaver  
De-  
inter-  
leaver  
Inter-  
leaver  
De-  
inter-  
leaver  
Inter-  
leaver  
Outer BCH  
Encoder  
Inner BCH  
Encoder  
BCH  
Decoder #1  
BCH  
Decoder #2  
Encoder  
De-  
inter-  
leaver  
BCH  
Decoder #3  
BCH  
Decoder #4  
Decoder  
1.2.3.2  
Error Correcting Performance  
The following figure shows the bit error ratio (BER) enhancement due to RS coding alone and  
concatenated iterative BCH-BCH coding. The EFEC code provides approximately 8.4 dB (theoretical),  
while the non-EFEC code provides approximately 6.2 dB.  
42 of 438  
VMDS-10185 Revision 4.0  
July 2006