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VSC6134ST-01 参数 Datasheet PDF下载

VSC6134ST-01图片预览
型号: VSC6134ST-01
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 438 页 / 4019 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VSC6134  
Datasheet  
TCM AIS  
TCM LTC  
A zero-to-one transition on OTUk_TCM_TTIINVD invalidates the entire TTI trace.  
TCM Bit Interleaved Parity 8 (BIP-8)  
Two internal counters accumulate the BIP-8 parity errors (24-bit counter) and BIP-8 block errors (20-bit  
counter). If calculated BIP-8 is 01011010 and received BIP-8 is 00011101, for example, then the parity  
error counter increments by 4 and the block error counter increments by 1.  
Once every second, the TCM BIP-8 error counts transfer to a set of duplicate cache registers  
OTUk_TCM_BIP8CNT[23:0] and OTUk_TCM_BIP8CNTBL[19:0] for microprocessor read access.  
Depending on the microprocessor configuration bit SAT_ROLLOVERN, the accumulators either clear  
(SAT_ROLLOVERN = 1) or retain their value (SAT_ROLLOVERN = 0) when the count transfers.  
Any one of the following conditions pauses TCM BIP-8 monitoring:  
OOF when OTUk_OOFCNT_CTRL = 1  
LOF  
LOS  
TCM IAE when OTUk_IAE_CTRL = 1  
TCM AIS  
TCM OCI  
TCM LTC  
TCM LCK  
A BIP-8 parity error sets the status bit OTUk_TCM_BIP8ERRS. OTUk_TCM_BIP8ERRS and its  
respective interrupt mask bit, OTUk_TCM_BIP8ERRM, create a maskable interrupt.  
TCM Backward Defect Indication (BDI)  
The TCM BDI monitor debounces TCM BDI by detecting identical TCM BDI bits over five  
consecutive frames. The live bit OTUk_TCM_BDIL is the last valid value of the debounced BDI. A  
status bit OTUk_TCM_BDIS is set on each OTUk_TCM_BDIL change of state. OTUk_TCM_BDIS  
and its respective mask bit OTUk_TCM_BDIM create a maskable interrupt.  
Any one of the following conditions resets the debouncing and pauses TCM BDI monitoring:  
OOF when OTUk_OOFDBC_CTRL = 1  
LOF  
LOS  
TCM LCK  
TCM OCI  
TCM AIS  
TCM LTC  
TCM Backward Error Indication (BEI)  
The TCM BEI monitor accumulates the BEI value in a 24-bit counter. Every second the BEI error count  
transfers to a cache register OTUk_TCM_BEICNT[23:0] for microprocessor read access. Depending on  
the microprocessor configuration bit SAT_ROLLOVERN, the accumulator either clears  
(SAT_ROLLOVERN = 1) or retains its value (SAT_ROLLOVERN = 0) after the count transfers.  
128 of 438  
VMDS-10185 Revision 4.0  
July 2006  
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