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VSC6134ST-01 参数 Datasheet PDF下载

VSC6134ST-01图片预览
型号: VSC6134ST-01
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 438 页 / 4019 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VSC6134  
Datasheet  
Any one of the following conditions resets the debouncing and pauses SM BDI monitoring:  
OOF when OTUk_OOFDBC_CTRL = 1  
LOF  
LOS  
SM Backward Error Indication (BEI)  
The SM BEI monitor accumulates the BEI value in a 24-bit counter. Every second the BEI error count  
transfers to a cache register OTUk_SM_BEICNT[23:0] for microprocessor read access. Depending on  
the microprocessor configuration bit SAT_ROLLOVERN, the accumulator either clears  
(SAT_ROLLOVERN = 1) or retains its value (SAT_ROLLOVERN = 0) after the count transfers.  
OTUk_SM_BDIL or OTUk_SM_BIAEL, when set, pauses BEI accumulation. Any one of the  
following conditions also pauses BEI accumulation:  
OOF when OTUk_OOFCNT_CTRL = 1  
LOF  
LOS  
BEI values of 1 through 8 set the status bit OTUk_SM_BEIS. OTUk_SM_BEIS and its respective mask  
bit OTUk_SM_BEIM create a maskable interrupt.  
The SM BEI monitor detects the BIAE signal by debouncing BEI over three consecutive frames. If SM  
BEI is equal to 1011 for three consecutive frames, the SM BEI monitor sets the live bit  
OTUk_SM_BIAEL. Three consecutive frames of SM BEI not equal to 1011 clear the live bit. Each  
transition of OTUk_SM_BIAEL sets the status bit OTUk_SM_BIAES. OTUk_SM_BIAES and its  
respective mask bit OTUk_SM_BIAEM create a maskable interrupt.  
Any one of the following conditions resets the debouncing and pauses SM BIAE monitoring:  
OOF when OTUk_OOFDBC_CTRL = 1  
LOF  
LOS  
SM Incoming Alignment Error (IAE)  
The SM IAE monitor debounces SM IAE by detecting identical SM IAE bits over five consecutive  
frames. The live bit OTUk_SM_IAEL is the last valid value of the debounced IAE. A status bit  
OTUk_SM_IAES is set on each OTUk_SM_IAEL change of state. OTUk_SM_IAES and its respective  
mask bit OTUk_SM_IAEM create a maskable interrupt.  
Any one of the following conditions resets the debouncing and pauses SM IAE monitoring:  
OOF when OTUk_OOFDBC_CTRL = 1  
LOF  
LOS  
SM Reserved Bits  
There is no on-chip processing done for the SM reserved bits.  
126 of 438  
VMDS-10185 Revision 4.0  
July 2006  
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