VSC6134
Datasheet
Any one of the following conditions resets the debouncing and pauses PM TTI monitoring:
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OOF when OTUk_OOFDBC_CTRL = 1
LOF
LOS
LOM
PM LCK
PM OCI
PM AIS
A zero-to-one transition on OTUk_PM_TTIINVD invalidates the entire TTI trace.
PM Bit Interleaved Parity 8 (BIP-8)
Two internal counters accumulate the BIP-8 parity errors (24-bit counter) and BIP-8 block errors (20-bit
counter). If calculated BIP-8 is 01011010 and received BIP-8 is 00011101, for example, then the parity
error counter increments by 4 and the block error counter increments by 1.
Once every second, the PM BIP-8 error counts transfer to a set of duplicate cache registers
OTUk_PM_BIP8CNT[23:0] and OTUk_PM_BIP8CNTBL[19:0] for microprocessor read access.
Depending on the microprocessor configuration bit SAT_ROLLOVERN, the accumulators either clear
(SAT_ROLLOVERN = 1) or retain their value (SAT_ROLLOVERN = 0) when the count transfers.
Any one of the following conditions pauses PM BIP-8 monitoring:
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OOF when OTUk_OOFCNT_CTRL = 1
LOF
LOS
PM AIS
PM OCI
PM LCK
A BIP-8 parity error sets the status bit OTUk_PM_BIP8ERRS. OTUk_PM_BIP8ERRS and its
respective interrupt mask bit, OTUk_PM_BIP8ERRM, create a maskable interrupt.
PM Backward Defect Indication (BDI)
The PM BDI monitor debounces PM BDI by detecting identical PM BDI bits over five consecutive
frames. The live bit OTUk_PM_BDIL is the last valid value of the debounced BDI. A status bit
OTUk_PM_BDIS is set on each OTUk_PM_BDIL change of state. OTUk_PM_BDIS and its respective
mask bit OTUk_PM_BDIM create a maskable interrupt.
Any one of the following conditions resets the debouncing and pauses PM BDI monitoring:
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●
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OOF when OTUk_OOFDBC_CTRL = 1
LOF
LOS
PM LCK
PM OCI
PM AIS
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VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
