TE
tmCH
T436416A
Page Read Cycle at Different Bank @ Burst Length = 4
0
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
C L O C K
H IG H
C K E
* N o te 1
C S
R A S
* N o te 2
C A S
R A a
C A a
R B b
C B b
C A c
C B d
C A e
A D D R
B A
R A a
R B b
A 1 0 /A P
Q A a 0
Q A a 1
Q A a 2
Q A a 3
Q B b 0
Q B b 1
Q B b 2
Q B b 3
Q A c 0
Q A c 1
Q B d 0
Q B d 1
Q A e 0
Q A e 1
C L = 2
D Q
Q A a 0
Q A a 1
Q A a 2
Q A a 3
Q B b 0
Q B b 1
Q B b 2
Q B b 3
Q A c 0
Q A c 1
Q B d 0
Q B d 1
Q A e 0
Q A e 1
C L = 3
W E
D Q M
R o w A c tiv e
( A - B a n k )
R e a d ( A -
B a n k )
R e a d ( B -
B a n k )
R e a d ( A -
B a n k )
R e a d ( B -
B a n k )
R e a d ( A -
B a n k )
P r e c h a r g e
( A - B a n k )
R o w A c tiv e
( B - B a n k )
:D o n 't c a re
*Note : 1. CS can be don’t cared when RAS,CAS and WE are high at the clock high going edge.
2. To interrupt a burst resd by row precharge, both the read and the precharge banks must be the same.
TM Technology Inc. reserves the right
to change products or specifications without notice.
P.18
Publication Date: MAY. 2003
Revision: B
TMT [ TAIWAN MEMORY TECHNOLOGY ]
