UCD9090
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SLVSA30A –APRIL 2011–REVISED AUGUST 2011
Power Good On
POWER GOOD
Watchdog
Reset Time
Watchdog
Start Time
Watchdog
Start Time
WDI
Delay
Watchdog
Reset Time
SYSTEM RESET
Delay or
GPI Tracking Release Delay
Figure 24. System Reset with Watchdog
Table 7. System-Reset Delay
Delay
0 ms
1 ms
2 ms
4 ms
8 ms
16 ms
32 ms
64 ms
128 ms
256 ms
512 ms
1.02 s
2.05 s
4.10 s
8.19 s
16.38 s
32.8 s
WATCH DOG TIMER
A GPI and GPO can be configured as a watchdog timer (WDT). The WDT can be independent of power-supply
sequencing or tied to a GPIO functioning as a watchdog output (WDO) that is configured to provide a
system-reset signal. The WDT can be reset by toggling a watchdog input (WDI) pin or by writing to
SYSTEM_WATCHDOG_RESET over I2C. The WDI and WDO pins are optional when using the watchdog timer.
The WDI can be replaced by SYSTEM_WATCHDOG_RESET command and the WDO can be manifested
through the Boolean Logic defined GPOs or through the System Reset function.
The WDT can be active immediately at power up or set to wait while the system initializes. Table 8 lists the
programmable wait times before the initial timeout sequence begins.
Table 8. WDT Initial Wait Time
WDT INITIAL WAIT TIME
0 ms
100 ms
200 ms
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