UCC28740
www.ti.com
SLUSBF3A –JULY 2013–REVISED JULY 2013
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
TYP
MAX
UNIT
V
VVDD
CVDD
IFB
Bias-supply operating voltage
VDD bypass capacitor
9
35
0.047
µF
Feedback current, continuous
VS pin current, out of pin
50
1
µA
mA
°C
IVS
TJ
Operating junction temperature
−20
125
THERMAL INFORMATION
UCC28740
THERMAL METRIC(1)
D
UNITS
7 PINS
141.5
73.8
θJA
Junction-to-ambient thermal resistance(2)
Junction-to-case (top) thermal resistance(3)
Junction-to-board thermal resistance(4)
θJCtop
θJB
89.0
°C/W
ψJT
ψJB
Junction-to-top characterization parameter(5)
Junction-to-board characterization parameter(6)
23.5
88.2
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
Copyright © 2013, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: UCC28740