UCC28740
www.ti.com
SLUSBF3A –JULY 2013–REVISED JULY 2013
FB (Feedback) The FB pin connects to the emitter of an analog-optocoupler output transistor which usually has
the collector connected to VDD. The current supplied to FB by the optocoupler is reduced internally by a
factor of 2.5 and the resulting current is applied to an internal 480-kΩ resistor to generate the control law
voltage (VCL). This VCL directly determines the converter switching frequency and peak primary current
required for regulation per the control-law for any given line and load condition.
DRV (Gate Drive) The DRV pin connects to the MOSFET gate pin, usually through a series resistor. The gate
driver provides a gate-drive signal limited to 14 V. The turnon characteristic of the driver is a 25-mA
current source which limits the turnon dv/dt of the MOSFET drain and reduces the leading-edge current
spike while still providing a gate-drive current to overcome the Miller plateau. The gate-drive turnoff
current is determined by the RDSON of the low-side driver along with any external gate-drive resistance.
Adding external gate resistance reduces the MOSFET drain turn-off dv/dt, if necessary.
CS (Current Sense) The current-sense pin connects through a series resistor (RLC) to the current-sense resistor
(RCS). The maximum current-sense threshold (VCST(max)) is 0.773 V for IPP(max), and the minimum current-
sense threshold (VCST(min)) is 0.194 V for IPP(min). RLC provides the feed-forward line compensation to
eliminate changes in IPP with input voltage due to the propagation delay of the internal comparator and
MOSFET turnoff time. An internal leading-edge blanking time of 235 ns eliminates sensitivity to the
MOSFET turnon current spike. Placing a bypass capacitor on the CS pin is unnecessary. The target
output current in constant-current (CC) regulation determines the value of RCS. The values of RCS and RLC
are calculated using Equation 3 and Equation 4. The term VCCR is the product of the demagnetization
constant, 0.425, and VCST(max). VCCRis held to a tighter accuracy than either of its constituent terms. The
term ηXFMR accounts for the energy stored in the transformer but not delivered to the secondary. This term
includes transformer resistance and core loss, bias power, and primary-to-secondary leakage ratio.
Example:
With a transformer core and winding loss of 5%, primary-to-secondary leakage inductance of 3.5%, and bias
power to output power ratio of 0.5%, the ηXFMR value at full power is approximately: 1 - 0.05 - 0.035 - 0.005 =
0.91.
V
´N
PS
CCR
R
=
´ h
XFMR
CS
2I
OCC
where
•
•
•
•
VCCR is a constant-current regulation factor (see ELECTRICAL CHARACTERISTICS),
NPS is the transformer primary-to-secondary turns-ratio (a ratio of 13 to 15 is typical for 5-V output),
IOCC is the target output current in constant-current regulation,
ηXFMR is the transformer efficiency at full power.
(3)
K
´R ´R ´ t ´N
LC
S1
CS
P
D
PA
R
=
LC
L
where
•
•
•
•
•
•
RS1 is the VS pin high-side resistor value,
RCS is the current-sense resistor value,
tD is the total current-sense delay consisting of MOSFET turnoff delay, plus approximately 50 ns internal delay,
NPA is the transformer primary-to-auxiliary turns-ratio,
LP is the transformer primary inductance,
KLC is a current-scaling constant for line compensation (see ELECTRICAL CHARACTERISTICS).
(4)
Copyright © 2013, Texas Instruments Incorporated
Submit Documentation Feedback
9
Product Folder Links: UCC28740
TI [ TEXAS INSTRUMENTS ]
