TVP5160
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SLES135E–FEBRUARY 2005–REVISED APRIL 2011
3.1 Register Definitions
Table 3-3. Input/Output Select
Subaddress 00h
Default
00h
7
6
5
4
3
2
1
0
Input select [7:0]
Twelve input terminals can be configured to support composite, S-Video, and component YPbPr. Only values in Table 3-4 are valid.
NOTE: The video output can be either CVBS, Y, or G.
Table 3-4. Analog Channel and Video Mode Selection
INPUT SELECT [7:0]
MODE
CVBS
INPUT(S) SELECTED
OUTPUT
VI_1
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
6
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
3
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
1
1
1
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
HEX
00
01
02
04
05
06
08
09
0A
0C
0D
0E
40
41
42
50
51
52
44
45
46
54
55
56
90
91
92
94
95
96
C0
C1
C2
VI_1 (default)
VI_2
VI_2
VI_3
VI_3
VI_4
VI_4
VI_5
VI_5
VI_6
VI_6
VI_7
VI_7
VI_8
VI_8
VI_9
VI_9
VI_10
VI_11
VI_12
VI_10
VI_11
VI_12
S-Video
VI_1(Y), VI_7(C)
VI_1(Y)
VI_2(Y)
VI_3(Y)
VI_1(Y)
VI_2(Y)
VI_3(Y)
VI_4(Y)
VI_5(Y)
VI_6(Y)
VI_4(Y)
VI_5(Y)
VI_6(Y)
VI_1(Y)
VI_2(Y)
VI_3(Y)
VI_4(Y)
VI_5(Y)
VI_6(Y)
VI_1(CVBS)
VI_2(CVBS)
VI_3(CVBS)
VI_2(Y), VI_8(C)
VI_3(Y), VI_9(C)
VI_1(Y), VI_10(C)
VI_2(Y), VI_11(C)
VI_3(Y), VI_12(C)
VI_4(Y), VI_7(C)
VI_5(Y), VI_8(C)
VI_6(Y), VI_9(C)
VI_4(Y), VI_10(C)
VI_5(Y), VI_11(C)
VI_6(Y), VI_12(C)
YPbPr
VI_10(Pb), VI_1(Y), VI_7(Pr)
VI_11(Pb), VI_2(Y), VI_8(Pr)
VI_12(Pb), VI_3(Y), VI_9(Pr)
VI_10(Pb), VI_4(Y), VI_7(Pr)
VI_11(Pb), VI_5(Y), VI_8(Pr)
VI_12(Pb), VI_6(Y), VI_9(Pr)
VI_10(B), VI_4(G), VI_7(R), VI_1(CVBS)
VI_11(B), VI_5(G), VI_8(R), VI_2(CVBS)
VI_12(B), VI_6(G), VI_9(R), VI_3(CVBS)
SCART
Copyright © 2005–2011, Texas Instruments Incorporated
Internal Control Registers
43
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