TVP5160
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SLES135E–FEBRUARY 2005–REVISED APRIL 2011
Table 3-1. I2C Registers Summary (continued)
REGISTER NAME
I2C SUBADDRESS
DEFAULT
00h
R/W(1)
R/W
R/W
R/W
R/W W
R/W
R/W
R
VDP TTX Filter 2 Mask 1
VDP TTX Filter 2 Mask 2
VDP TTX Filter 2 Mask 3
VDP TTX Filter 2 Mask 4
VDP TTX Filter 2 Mask 5
VDP TTX Filter Control
VDP FIFO Word Count
B6h
B7h
00h
B8h
00h
B9h
00h
BAh
00h
BBh
00h
BCh
VDP FIFO Interrupt Threshold
Reserved
BDh
80h
R/W
BEh
VDP FIFO Reset
BFh
00h
00h
R/W
R/W
R/W
R/W
VDP FIFO Output Control
VDP Line Number Interrupt
VDP Pixel Alignment
Reserved
C0h
C1h
00h
C2h–C3h
C4h–D5h
D6h
01Eh
VDP Line Start
06h
1Bh
FFh
00h
FFh
R/W
R/W
R/W
R/W
R/W
R
VDP Line Stop
D7h
VDP Global Line Mode
VDP Full Field Enable
VDP Full Field Mode
Interlaced/Progressive Status
Reserved(2)
D8h
D9h
DAh
DBh
DCh-DFh
E0h
VBUS Data Access with No VBUS Address Increment
VBUS Data Access with VBUS Address Increment
VDP FIFO Read Data
Reserved(2)
R/W
R/W
R
E1h
E2h
E3h-E7h
E8h–EAh
EBh-EFh
F0h
VBUS Address Access
Reserved(2)
00 0000h
R/W
Interrupt Raw Status 0
Interrupt Raw Status 1
Interrupt Status 0
R
R
F1h
F2h
R
Interrupt Status 1
F3h
R
Interrupt Mask 0
F4h
00h
00h
00h
00h
R/W
R/W
R/W
R/W
Interrupt Mask 1
F5h
Interrupt Clear 0
F6h
Interrupt Clear 1
F7h
Reserved(2)
F8h-FFh
Copyright © 2005–2011, Texas Instruments Incorporated
Internal Control Registers
41
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