TPS23750
TPS23770
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SLVS590A–JULY 2005–REVISED AUGUST 2005
PoE Input Capacitor
IEEE 802.3af requires a PD input capacitance between 0.05 µF and 0.12 µF during detection. This capacitor
should be located directly adjacent to the TPS23750 as shown in Figure 1. A 100 V, 10%, X7R ceramic capacitor
meets the specification over a wide temperature range.
Input Transient Voltage Suppressor (TVS)
A TVS across the rectified PoE voltage per Figure 1 must be used. An SMAJ58A, or a part with equal to or better
performance, is recommended. If an auxiliary supply is connected from VDD - RTN, voltage transients caused by
the input cable inductance ringing with the internal PD capacitance can occur. Adequate capacitive filtering or a
TVS must limit this voltage to be within the absolute maximum ratings.
Converter Bulk Capacitor
IEEE 802.3af requires a PD input capacitance of 5 µF minimum while in the powered state. More capacitance is
generally required to meet conducted emissions such as CISPR22 or those implied by IEEE 802.3af sections
33.3.4 and 33.3.5. At least several microfarads should appear directly between VDD and RTN to aid in control of
transients.
TMR Capacitor
CTMR plays a major role in controlling the turn-on profile and input current drawn when the internal error amplifier
is used. The nominal expression for this capacitor is
CTMR = 33 × 10–6× t
where t is the desired softstart period and CTMR is in Farads. The softstart period may vary by 50% due to
variation in TMR currents and capacitor tolerance. The capacitor should be oversized accordingly. Typical
softstart periods are on the order of several milliseconds. The delay between output fault and converter shutdown
(hiccup start) is
tDELAY = 95 × 103 × CTMR
where tDELAY is in seconds and CTMR is in Farads.
The softstart capacitor also assists an isolated design that does not use the internal error amplifier in limiting the
peak input current. The output error amplifier still has to swing from saturation to regulation during startup, so a
secondary-side softstart may be required as well.
Thermal Considerations and MOSFET QG
The AUX internal regulator may dissipate a large amount of heat. This occurs when high AUX rail currents are
drawn from the VDD rail rather than an external source. When an external supply powers AUX, the internal
dissipation remains low. AUX supplies internal bias currents as well as external loads such as the switching
MOSFET and optocoupler.
Applications that use a transformer-coupled circuit can override the internal AUX regulator by means of an
additional winding as shown in Figure 38. Under a fault condition, such as an output short, the AUX regulator is
active. Significant instantaneous power can be dissipated based on the gate drive loading, however the
optocoupler does not draw power when this occurs. TMR limits the average operating duty cycle to less than
10%, which greatly reduces internal power dissipation.
Applications that do not override the internal AUX regulator should minimize the loading on AUX. The primary
source of loading is the converter’s switching-MOSFET gate capacitance. QG is the MOSFET data sheet
parameter that defines the charge required to switch the transistor on or off. The switching MOSFET should be
chosen to balance the rDS(on)-related MOSFET loss with the amount of gate-drive current it requires. Suitable
devices are available with a QG in the region of 5 nC for many applications, and it is not recommended that
devices larger than 20 nC be used. An approximate expression for the internal power dissipated due to gate
drive is:
PDISS_GATE_DRV = [VDD× QG×f ].
The PowerPAD provides a low thermal resistance path for heat removal, enabling applications where high
dissipation can’t be avoided.
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