TPS23750
TPS23770
www.ti.com
SLVS590A–JULY 2005–REVISED AUGUST 2005
CONCEPT SCHEMATICS
The TPS23750 will work with almost any conventional circuit. Figure 38, Figure 39, and Figure 40 demonstrate
the TPS23750’s use. Figure 38 is an isolated synchronous flyback, Figure 39 is a non-isolated flyback, and
Figure 40 is a buck converter variant. Each of these circuits provides a single output. Multiple outputs can be
created by use of techniques such as multi-secondary transformers and combinations of linear and switching
regulators. These three circuits form the basis of the two EVMs available for this product.
Isolated Flyback Example
The isolated synchronous flyback of Figure 38 is appropriate where the PD has a non-isolated metallic interface
such as RS-232 or USB, or cannot pass 1500V hipot per IEC60950 section 6.2. A forward converter can also be
used for this application.
This example includes provision for an external wall adapter with the voltage applied directly to the converter
input, after the PoE output. Adapter inputs from 24 V to 48 V (nominal) can be connected and the converter
starts up, although this particular converter is designed to run from 48 V. Sequencing between the PoE input,
adapter input, and converter operation is internally handled.
The standard PoE front end, starting with the RJ-45 connector, includes the diode bridges, capacitor, and TVS.
The TPS23750 forms the heart of the control circuit, performing the basic PoE and dc/dc converter functions. R1
implements detection. R4 sets the PD as a Class 3 (full power) device. An internal MOSFET isolates the
converter from the input during PoE detection and classification, while performing inrush limit and current limit
under fault conditions. Input energy storage and EMI filtering are performed by the π filter consisting of C4, L1,
C1, and C2. The converter startup bias is handled by internal regulators, eliminating the need for several external
components.
The internal error amplifier and buck regulator sense circuitry are disabled by setting MODE to VBIAS and SEN to
RTN. Disabling the internal error amplifier allows the external optocoupler U3 to drive COMP as a high
impedance pin. BL is tied to VBIAS to select the longer blanking period which allows for the output synchronous
rectifier (Q1) recovery. C16 sets the softstart and hiccup period, while R23 sets a 100 kHz switching frequency.
In this design, the switching frequency was set to 100 kHz to help reduce the switching losses. C11 and C12
provide bypass for the internal regulators, and D6 and R6 provide AUX bias power from the transformer to
improve efficiency. D5, R2, and C3 form a voltage clamp to protect switching MOSFET Q2 from voltage spikes
as it turns off. The current-sense resistor, R8, feeds the current-mode control comparator through RSP, and sets
the current limit. R9 is present to protect the RSP pin’s ESD clamp from excessive current caused by negative
voltage across R8. This is an unusual condition that arises when this synchronous converter topology stops
switching with voltage remaining on the output, causing the output energy to be recycled to the input.
In this 5-V output example, the transformer primary inductance is 150 µH with turns ratios of
PRI:BIAS:OUTPUT:GATE of 5:2.22:1:1.56. Winding 7–8 provides gate drive for the synchronous rectifier Q1.
The design operates in continuous conduction down to no load due to the synchronous rectifier operation. An
output π-filter is formed by C5, C6, C7, L2, and C8. This filter, which provides very low output ripple, may be
simplified for some applications. The feedback is driven by a conventional TL431 error amplifier, U2, driving an
optocoupler, U3. Components D9, C18, and R13 act as a softstart that limits turn-on overshoot while U2 swings
its cathode several volts to regulate. C17 serves to compensate the inner feedback loop caused by biasing the
optocoupler from the output. C10 aids in EMI control, and has a high voltage rating to meet the 1500 V isolation
test required in the standard.
Nonisolated Flyback Example
The nonisolated flyback of Figure 39 resembles the isolated version. This converter is sometimes used to
generate multiple outputs in applications where there are no metallic interfaces and the PD can meet the
IEEE802.3af 1500 V hipot without isolation. Multiple outputs can be provided by adding secondary windings to
T2 along with diodes and capacitors. The synchronous rectifier has been replaced by a diode for demonstration
purposes. While the diode is simpler and cheaper, the synchronous rectifier’s lower power loss improves
efficiency for low-voltage, high-current outputs. T2 winding 7-8 is not needed for a production design. The TL431
based error amplifier and optocoupler have been removed, and the TPS23750 internal error amplifier has been
enabled by tying MODE to RTN. FB and COMP are used in a standard error amplifier topology for control and
compensation.
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