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Silicon Change Overview
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Silicon Change Overview
Table 2 lists the change(s) made to each silicon revision.
Table 2. TMS320F2833x and TMS320F2823x Silicon Change Overview
REVISION
CHANGES MADE
0
First silicon release
A
Changes
The following changes are implemented with Revision A:
•
Flash API version 2.00 is needed for Rev A silicon. This version is backward-compatible with Rev 0 silicon.
•
McBSP boot loader
McBSP loader will now echo back the data received. This was not the case on Rev 0.
DMA connection to ePWM
•
The ePWM/HRPWM modules can be re-mapped to peripheral frame 3 where they can be accessed by the DMA
module.
In addition, the SOCA and SOCB of each EPWM module is connected to the DMA at the following peripheral
interrupt select positions in each channel MODE register (MODE[PERINTSEL(4:0)] bits):
EPWM1-SOCA → PERINTSEL(18)
EPWM1-SOCB → PERINTSEL(19)
EPWM2-SOCA → PERINTSEL(20)
EPWM2-SOCB → PERINTSEL(21)
EPWM3-SOCA → PERINTSEL(22)
EPWM3-SOCB → PERINTSEL(23)
EPWM4-SOCA → PERINTSEL(24)
EPWM4-SOCB → PERINTSEL(25)
EPWM5-SOCA → PERINTSEL(26)
EPWM5-SOCB → PERINTSEL(27)
EPWM6-SOCA → PERINTSEL(28)
EPWM6-SOCB → PERINTSEL(29)
•
•
The PARTID register moved to address 0x380090. PARTID values changed. See the TMS320F28335,
TMS320F28334, TMS320F28332, TMS320F28235, TMS320F28234, TMS320F28232 Digital Signal
Controllers (DSCs) Data Manual (SPRS439) for details.
The address 0x882 (formerly the PARTID register) is now called the CLASSID register. See the
TMS320F28335, TMS320F28334, TMS320F28332, TMS320F28235, TMS320F28234, TMS320F28232 Digital
Signal Controllers (DSCs) Data Manual (SPRS439) for details.
Advisories Fixed
The following advisories are fixed in rev A :
•
•
•
Boot to XINTF x16, x32 and Parallel Boot Setup Issue
M1 memory access conflict
XINTF rogue write for back-to-back accesses to x16/x32 zones.
Behavior changed such that external delay logic is no longer required to avoid this issue on Rev A. The behavior
of the XA0/XWE1 signal has been modified such that it goes high during inactive cycles. Use the XBANK feature
to force inactive cycles between back-to-back zone accesses. See the TMS320x2833x, 2823x External Interface
(XINTF) Reference Guide (SPRU949) for more information.
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SPRZ272F–September 2007–Revised April 2011
TMS320F2833x and TMS320F2823x DSC Silicon Errata
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