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Advisory
— eQEP: Missed First Index Event
Advisory
Revision(s) Affected
Details
eQEP: Missed First Index Event
A
If the first index event edge at the QEPI input occurs at any time from one system clock
cycle before the corresponding QEPA/QEPB edge to two system clock cycles after the
corresponding QEPA/QEP edge, then the eQEP module may miss this index event. This
can result in the following behavior:
• QPOSCNT will not be reset on the first index event if QEPCTL[PCRM] = 00b or 10b
(position counter reset on an index event or position counter reset on the first index
event).
• The first index event marker flag (QEPSTS[FIMF]) will not be set.
Reliable operation is achieved by delaying the index signal such that the QEPI event
edge occurs at least two system clock cycles after the corresponding QEPA/QEPB
signal edge. For cases where the encoder may impart a negative delay (t
d
) to the QEPI
signal with respect to the corresponding QEPA/QEPB signal (i.e., QEPI edge occurs
before the corresponding QEPA/QEPB edge), the QEPI signal should be delayed by an
amount greater than "t
d
+ 2*SYSCLKOUT".
Workaround(s)
SPRZ272F – September 2007 – Revised April 2011
TMS320F2833x and TMS320F2823x DSC Silicon Errata
© 2007–2011, Texas Instruments Incorporated
15
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