TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
SPRS358F–APRIL 2007–REVISED AUGUST 2008
www.ti.com
Table 8-75. Timing Requirements for HS-RTDX
(see Figure 8-43)
NO.
PARAMETER
MIN
20
1.5
1.5
3
MAX UNITS
1
2
3
4
5
6
tc(TCK)
Cycle time, TCK
ns
ns
ns
tsu(TCKH-EMUn)
th(TCKH-EMUn)
td(TCKH-EMUn)
tpoz(EMUn)
Setup time, EMUn input valid before TCK high
Hold time, EMUn input valid after TCK high
Delay time, TCK high to EMUn output valid
Propagation delay from output to high impedance
Propagation delay from high impedance to output
16.5
16.5
16.5
ns
ns
ns
3
tpzo (EMUn)
3
1
TCK
4
2
3
EMU[n]
Figure 8-43. HS-RTDX Timing
180
Peripheral Information and Electrical Specifications
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