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TMS320TCI6487 参数 Datasheet PDF下载

TMS320TCI6487图片预览
型号: TMS320TCI6487
PDF下载: 下载PDF文件 查看货源
内容描述: 通信基础设施数字信号处理器 [Communications Infrastructure Digital Signal Processor]
分类和应用: 数字信号处理器通信
文件页数/大小: 206 页 / 2183 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320TCI6487  
TMS320TCI6488  
Communications Infrastructure Digital Signal Processor  
SPRS358FAPRIL 2007REVISED AUGUST 2008  
www.ti.com  
8.19.2 Trace  
The TCI6487/8 device supports Trace. Trace is a debug technology that provides a detailed, historical  
account of application code execution, timing, and data accesses. Trace collects, compresses, and  
exports debug information for analysis. Trace works in real-time and does not impact the execution of the  
system.  
For more information on board design guidelines for Trace Advanced Emulation, see the 60-Pin Emulation  
Header Technical Reference (literature number SPRU655).  
Table 8-73. Timing Requirements for Trace  
(see Figure 8-41)  
NO.  
1
PARAMETER  
Pulse duration, EMUn high  
tw(EMUnH) 90% Pulse duration, EMUn high detected at 90% VOH  
MIN  
3 - 0.6(1)  
1.5  
MAX UNITS  
tw(EMUnH)  
ns  
ns  
ns  
ns  
ns  
ns  
1
1a  
1b  
2
tw(TCKH)  
tw(TCKL)  
tw(EMUnL)  
Pulse width time TCK high  
Pulse width time TCK low  
Pulse duration, EMUn low  
8
8
3 - 0.6(1)  
2
tw(EMUnL) 10% Pulse duration, EMUn low detected at 10% VOH  
1.5  
3
tsko(EMUn) Output Skew time, time delay difference between EMU pins configured as  
-500  
500  
ps  
trace.  
4
tskp(EMUn)  
Pulse Skew, magnitude of time difference between high-to-low (TPHL) and  
low-to-high (TPLH) propagation delays.  
600(1)  
ps  
(1) This parameter applies to the maximum trace export frequency operating in a 40/60 duty cycle.  
A
tPHL  
tPLH  
1
2
B
C
3
Figure 8-41. Trace Timing  
178  
Peripheral Information and Electrical Specifications  
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