TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
SPRS358F–APRIL 2007–REVISED AUGUST 2008
www.ti.com
Table 2-2. Memory Map Summary (continued)
HEX ADDRESS RANGE
MEMORY BLOCK DESCRIPTION
SYMMETRIC L2
ASYMMETRIC L2
SIZE
C64x+
MEGAMODULE
CORE 0
C64x+
MEGAMODULE
CORE 1
C64x+
MEGAMODULE
CORE 2
C64x+
MEGAMODULE
CORE 0
C64x+
MEGAMODULE
CORE 1
C64x+
MEGAMODULE
CORE 2
START
END
02D2 1000
02D4 0000
02D8 0000
02DC 0000
02E0 0000
02E0 4000
02F0 0000
02F1 0000
02F2 0000
02F4 0000
02F6 0000
02D3 FFFF
02D7 FFFF
02DB FFFF
02DF FFFF
02E0 3FFF
02EF FFFF
02F0 FFFF
02F1 FFFF
02F3 FFFF
02F5 FFFF
02FF FFFF
124K
256K
256K
256K
16K
Reserved
Reserved
Reserved
Reserved
RapidIO Descriptor Memory
Reserved
1M - 16K
64K
Reserved
64K
Reserved
128K
128K
640K
Reserved
Reserved
Reserved
Reserved
0300 0000
0400 0000
03FF FFFF
0FFF FFFF
16M
Reserved
Reserved
192M
Global Ram
1000 0000
1080 0000
1088 0000
1090 0000
1098 0000
10A0 0000
10E0 0000
10E0 8000
10F0 0000
10F0 8000
1100 0000
1180 0000
1188 0000
1190 0000
1198 0000
11A0 0000
11E0 0000
11E0 8000
11F0 0000
11F0 8000
1200 0000
1280 0000
1288 0000
1290 0000
1298 0000
12A0 0000
12E0 0000
12E0 8000
12F0 0000
12F0 8000
1300 0000
107F FFFF
1087 FFFF
108F FFFF
1097 FFFF
109F FFFF
10DF FFFF
10E0 7FFF
10EF FFFF
10F0 7FFF
10FF FFFF
117F FFFF
1187 FFFF
118F FFFF
1197 FFFF
119F FFFF
11DF FFFF
11E0 7FFF
11EF FFFF
11F0 7FFF
11FF FFFF
127F FFFF
1287 FFFF
128F FFFF
1297 FFFF
129F FFFF
12DF FFFF
12E0 7FFF
12EF FFFF
12F0 7FFF
12FF FFFF
1FFF FFFF
8M
512K
512K
512K
512K
4M
Reserved
C64x+ Megamodule Core 0 L2 RAM
Reserved
C64x+ Megamodule Core 0 L2 SRAM
Reserved
Reserved
32K
C64x+ Megamodule Core 0 L1P SRAM
1M - 32K
32K
Reserved
C64x+ Megamodule Core 0 L1D SRAM
Reserved
1M - 32K
8M
Reserved
512K
512K
512K
512K
4M
C64x+ Megamodule Core 1 L2 SRAM
C64x+ Megamodule Core 1 L2 SRAM
Reserved
Reserved
Reserved
Reserved
32K
C64x+ Megamodule Core 1 L1P SRAM
1M - 32K
32K
Reserved
C64x+ Megamodule Core 1 L1D SRAM
Reserved
1M - 32K
8M
Reserved
512K
512K
512K
512K
4M
C64x+ Megamodule Core 2 L2 SRAM
Reserved
C64x+ Megamodule Core 2 L2 SRAM
Reserved
Reserved
Reserved
32K
C64x+ Megamodule Core 2 L1P SRAM
1M - 32K
32K
Reserved
C64x+ Megamodule Core 2 L1D SRAM
Reserved
1M - 32K
208M
Reserved
Data Space on EDMA SCR
2000 0000
3000 0000
3000 0100
3400 0000
3400 0100
2FFF FFFF
3000 00FF
33FF FFFF
3400 00FF
3BFF FFFF
256M
256
Reserved
McBSP0 Data
Reserved
64M - 256
256
McBSP1 Data
Reserved
128M - 256
14
Device Overview
Submit Documentation Feedback