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TMS320TCI6487 参数 Datasheet PDF下载

TMS320TCI6487图片预览
型号: TMS320TCI6487
PDF下载: 下载PDF文件 查看货源
内容描述: 通信基础设施数字信号处理器 [Communications Infrastructure Digital Signal Processor]
分类和应用: 数字信号处理器通信
文件页数/大小: 206 页 / 2183 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320TCI6487  
TMS320TCI6488  
Communications Infrastructure Digital Signal Processor  
SPRS358FAPRIL 2007REVISED AUGUST 2008  
www.ti.com  
Table 8-12. C64x+ Megamodule Chip Interrupt Controller Event List CIC[2:0] (continued)  
EVENT CHANNEL  
EVENT  
FSEVT28  
EVENT DESCRIPTION  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59 - 63  
FSYNC Event 28  
FSEVT29  
FSYNC Event 28  
VCPREVT  
VCP Receive Event  
VCP Transmit Event  
TCP Receive Event  
TCP Transmit Event  
TPCC Error Interrupt  
VCPXEVT  
TCPREVT  
TCPXEVT  
TPCC_ERRINT  
TPCC_MPINT  
TPTC_ERRINT0  
TPTC_ERRINT1  
TPTC_ERRINT2  
TPTC_ERRINT3  
TPTC_ERRINT4  
TPTC_ERRINT5  
TPCC_AETEVT  
AIF_EVT2  
TPCC Memory Protection Interrupt  
TPTC0 Error Interrupt  
TPTC1 Error Interrupt  
TPTC2 Error Interrupt  
TPTC3 Error Interrupt  
TPTC4 Error Interrupt  
TPTC5 Error Interrupt  
TPCC AET Event  
AIF CPU Interrupt 2  
AIF_EVT3  
AIF CPU Interrupt 2  
AIF_PSEVT0  
AIF_PSEVT1  
AIF_PSEVT2  
AIF_PSEVT3  
AIF_PSEVT4  
AIF_PSEVT5  
AIF_PSEVT6  
AIF_BUFEVT  
Unused  
Packet Switched Transfer Event 0  
Packet Switched Transfer Event 1  
Packet Switched Transfer Event 2  
Packet Switched Transfer Event 3  
Packet Switched Transfer Event 4  
Packet Switched Transfer Event 5  
Packet Switched Transfer Event 6  
AIF Capture Buffer Event.  
Reserved  
RAC_DEVENT0  
RAC_DEVENT1  
SEMERRn(1)  
Unused  
Debug Event  
Debug Event  
Semaphore Error Event for C64x+ Megamodulen  
Reserved  
(1) C64x+ Megamodule Core 0, C64x+ Megamodule Core 1, and C64x+ Megamodule Core 2 receive SEMERR0, SEMERR1, and  
SEMERR2, respectively.  
Another system event selector is present to route events to the TPCC. Most system events routed through  
the event controller to the TPCC are CPU events that do not normally require DMA servicing, but may be  
used to trigger a statistics capture. Several events are routed through the event controller that may be  
used to trigger a DMA transaction in normal operation, but the programmer must make a resource tradeoff  
to use these events. Table 8-13 lists all of the events routed through the TPCCs system event controller.  
106  
Peripheral Information and Electrical Specifications  
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