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TMS320VC5416ZGU160 参数 Datasheet PDF下载

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型号: TMS320VC5416ZGU160
PDF下载: 下载PDF文件 查看货源
内容描述: TMS320VC5416定点数字信号处理器 [TMS320VC5416 Fixed-Point Digital Signal Processor]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器装置时钟
文件页数/大小: 98 页 / 855 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320VC5416  
Fixed-Point Digital Signal Processor  
www.ti.com  
SPRS095OMARCH 1999REVISED JANUARY 2005  
5.5 Memory and Parallel I/O Interface Timing  
5.5.1 Memory Read  
External memory reads can be performed in consecutive or nonconsecutive mode under control of the CONSEC  
bit in the BSCR. Table 5-7 and Table 5-8 assume testing over recommended operating conditions with MSTRB =  
0 and H = 0.5tc(CO) (see Figure 5-5 and Figure 5-6).  
Table 5-7. Memory Read Timing Requirements  
5416-120  
5416-160  
UNIT  
MIN  
MAX  
ta(A)M1  
ta(A)M2  
tsu(D)R  
th(D)R  
Access time, read data access from address valid, first read access(1)  
Access time, read data access from address valid, consecutive read accesses(1)  
Setup time, read data valid before CLKOUT low  
4H–9  
2H–9  
ns  
ns  
ns  
ns  
7
0
Hold time, read data valid after CLKOUT low  
(1) Address, R/W, PS, DS, and IS timings are all included in timings referenced as address.  
Table 5-8. Memory Read Switching Characteristics  
5416-120  
5416-160  
PARAMETER  
UNIT  
MIN  
–1  
–1  
0
MAX  
td(CLKL-A)  
Delay time, CLKOUT low to address valid(1)  
Delay time, CLKOUT low to MSTRB low  
Delay time, CLKOUT low to MSTRB high  
4
4
4
ns  
ns  
ns  
td(CLKL-MSL)  
td(CLKL-MSH)  
(1) Address, R/W, PS, DS, and IS timings are all included in timings referenced as address.  
60  
Electrical Specifications  
 
 
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