TMS320VC5416
Fixed-Point Digital Signal Processor
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SPRS095O–MARCH 1999–REVISED JANUARY 2005
5.5.3 I/O Read
Table 5-10 and Table 5-11 assume testing over recommended operating conditions, IOSTRB = 0, and H =
0.5tc(CO) (see Figure 5-8).
Table 5-10. I/O Read Timing Requirements
5416-120
5416-160
UNIT
MIN
MAX
4H – 9
ta(A)M1
tsu(D)R
th(D)R
Access time, read data access from address valid, first read access(1)
Setup time, read data valid before CLKOUT low
ns
ns
ns
7
0
Hold time, read data valid after CLKOUT low
(1) Address, R/W, PS, DS, and IS timings are all included in timings referenced as address.
Table 5-11. I/O Read Switching Characteristics
5416-120
5416-160
PARAMETER
UNIT
MIN
– 1
– 1
0
MAX
td(CLKL-A)
Delay time, CLKOUT low to address valid(1)
Delay time, CLKOUT low to IOSTRB low
Delay time, CLKOUT low to IOSTRB high
4
4
4
ns
ns
ns
td(CLKL-IOSL)
td(CLKL-IOSH)
(1) Address, R/W, PS, DS, and IS timings are all included in timings referenced as address.
64
Electrical Specifications
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