TMS320VC5416
Fixed-Point Digital Signal Processor
www.ti.com
SPRS095O–MARCH 1999–REVISED JANUARY 2005
5.4 Clock Options
The frequency of the reference clock provided at the CLKIN pin can be divided by a factor of two or four or
multiplied by one of several values to generate the internal machine cycle.
5.4.1 Divide-By-Two and Divide-By-Four Clock Options
The frequency of the reference clock provided at the X2/CLKIN pin can be divided by a factor of two or four to
generate the internal machine cycle. The selection of the clock mode is described in Section Section 3.10.
When an external clock source is used, the frequency injected must conform to specifications listed in Table 5-3.
An external frequency source can be used by applying an input clock to X2/CLKIN with X1 left unconnected.
Table 5-2 shows the configuration options for the CLKMD pins that generate the external divide-by-2 or
divide-by-4 clock option. Table 5-3 and Table 5-4 assume testing over recommended operating conditions and H
= 0.5tc(CO) (see Figure 5-3).
Table 5-2. Clock Mode Pin Settings for the Divide-By-2 and By Divide-By-4 Clock Options
CLKMD1
CLKMD2
CLKMD3
Clock Mode
0
1
1
0
0
1
0
1
1
1/2, PLL disabled
1/4, PLL disabled
1/2, PLL disabled
Table 5-3. Divide-By-2 and Divide-By-4 Clock Options Timing Requirements
5416-120
5416-160
Unit
MIN
MAX
tc(CI)
Cycle time, X2/CLKIN
20
ns
ns
ns
ns
ns
tf(CI)
Fall time, X2/CLKIN
4
4
tr(CI)
Rise time, X2/CLKIN
tw(CIL)
tw(CIH)
Pulse duration, X2/CLKIN low
Pulse duration, X2/CLKIN high
4
4
Table 5-4. Divide-By-2 and Divide-By-4 Clock Options Switching Characteristics
5416-120
TYP
5416-160
TYP
PARAMETER
Cycle time, CLKOUT
Unit
MIN
8.33(1)
4
MAX
MIN
6.25(1)
4
MAX
(2)
(2)
tc(CO)
ns
ns
ns
ns
ns
ns
td(CIH-CO)
tf(CO)
Delay time, X2/CLKIN high to CLKOUT high/low
Fall time, CLKOUT
7
1
11
7
1
11
tr(CO)
Rise time, CLKOUT
1
1
tw(COL)
tw(COH)
Pulse duration, CLKOUT low
Pulse duration, CLKOUT high
H – 2
H – 2
H
H
H + 1 H – 2
H + 1 H – 2
H
H
H + 1
H + 1
(1) It is recommended that the PLL clocking operation be used for maximum frequency operation.
(2) This device utilizes a fully static design and therefore can operate with tc(Cl) approaching ∞. The device is characterized at frequencies
approaching 0 Hz.
Electrical Specifications
57