TMS320VC5416
Fixed-Point Digital Signal Processor
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SPRS095O–MARCH 1999–REVISED JANUARY 2005
Table 3-3. Software Wait-State Register (SWWSR) Bit Fields
BIT
NAME
RESET
VALUE
FUNCTION
NO.
Extended program address control bit. XPA is used in conjunction with the program space fields
(bits 0 through 5) to select the address range for program space wait states.
15
XPA
0
I/O space. The field value (0-7) corresponds to the base number of wait states for I/O space accesses
within addresses 0000-FFFFh. The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for
the base number of wait states.
14-12
11-9
8-6
I/O
111
Upper data space. The field value (0-7) corresponds to the base number of wait states for external
data space accesses within addresses 8000-FFFFh. The SWSM bit of the SWCR defines a
multiplication factor of 1 or 2 for the base number of wait states.
Data
Data
111
111
Lower data space. The field value (0-7) corresponds to the base number of wait states for external
data space accesses within addresses 0000-7FFFh. The SWSM bit of the SWCR defines a
multiplication factor of 1 or 2 for the base number of wait states.
Upper program space. The field value (0-7) corresponds to the base number of wait states for external
program space accesses within the following addresses:
•
•
XPA = 0: xx8000 - xxFFFFh
XPA = 1: 400000h - 7FFFFFh
5-3
2-0
Program
Program
111
111
The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for the base number of wait states.
Program space. The field value (0-7) corresponds to the base number of wait states for external
program space accesses within the following addresses:
•
•
XPA = 0: xx0000 - xx7FFFh
XPA = 1: 000000 - 3FFFFFh.
The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for the base number of wait states.
The software wait-state multiplier bit of the software wait-state control register (SWCR) is used to extend
the base number of wait states selected by the SWWSR. The SWCR bit fields are shown in Figure 3-6
and described in Table 3-4.
15
8
Reserved
R/W-0
7
1
0
Reserved
R/W-0
SWSM
R/W-0
LEGEND: R = Read, W = Write, n = value present after reset
Figure 3-6. Software Wait-State Register (SWWSR) [Memory-Mapped Register (MMR) Address
0028h]
Table 3-4. Software Wait-State Control Register (SWCR) Bit Fields
PIN
NAME
RESET
VALUE
FUNCTION
These bits are reserved and are unaffected by writes.
NO.
15-1
Reserved
0
Software wait-state multiplier. Used to multiply the number of wait states defined in the SWWSR by a
factor of 1 or 2.
0
SWSM
0
•
•
SWSM = 0: wait-state base values are unchanged (multiplied by 1)
SWSM = 1: wait-state base values are multiplied by 2 for a maximum of 14 wait states
24
Functional Overview
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